All pull requests

Pull requests

• Fix APU tracer clock and reset connections

  #1087·jinchuntan opened Oct 23, 2026·

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  1

• Use register fields in the cv.insertr range constraint

  #1086·jinchuntan opened Oct 23, 2026·

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• Backport FPU parameter compatibility fix

  #1085·jinchuntan opened Oct 23, 2026·

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• Clarify FPU instruction issue limits

  #1084·jinchuntan opened Oct 23, 2026·

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• Fix Bender source list for the current core

  #1083·jinchuntan opened Oct 23, 2026·

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• Document misaligned access atomicity

  #1082·jinchuntan opened Oct 23, 2026·

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• Fix nested port lists in example constraints

  #1081·jinchuntan opened Oct 23, 2026·

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• Add formal assertion for unreachable controller state (#1010)

  #1073·avinashkollu-git opened Sep 24, 2026·

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  4

• Fix clock and reset names in controller bind

  #1072·avinashkollu-git opened Sep 24, 2026·

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  2

• rtl: fix mstatus.FS pipeline hazard after flw

  #1070·devtyagi3909 opened Sep 2, 2026·

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  1

  8

• perf: optimize cv32e40p_alu_div and cv32e40p_mult critical paths

  #1068·pratyushrai301 opened Jul 9, 2026·

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• dev to master update

  #1062·davideschiavone opened May 29, 2026Contributor·

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  3

• fix: correct manifest pointing to nonexistent cv32e40p_fetch_fifo.sv

  #1059·Apole-dev opened Apr 17, 2026·

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• Update Read the Docs OS version to Ubuntu 24.04

  #1055·MikeOpenHWGroup opened Mar 31, 2026Contributor·

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  2

• rtl: add missing fpu divsqrt file to manifest (Fixes #1049)

  #1051·DymShanks opened Feb 11, 2026·

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  2

• vendorized cvfpu with common_cells

  #822·davideschiavone opened Jun 23, 2023Contributor·

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  1

• Create dc_setup_filenames.tcl

  #781·abdelazeem201 opened Mar 1, 2023·

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• Create design.tcl

  #780·abdelazeem201 opened Mar 1, 2023·

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• Create dc.tcl

  #779·abdelazeem201 opened Mar 1, 2023·

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• Create dc_setup.tcl

  #778·abdelazeem201 opened Mar 1, 2023·

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• [DO NOT MERGE] Break the ALU

  Status:Do-not-merge
  #703·suppamax opened Apr 27, 2022Contributor·

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• Add FPGA Optimized Register File Version

  WAIVED:CV32E40P
  #433·ganoam opened Jul 29, 2020·

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  5

• Fusesoc and Linter

  WAIVED:CV32E40P
  #368·wallento opened Jun 16, 2020Contributor·

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  13

• Add FuseSoC support

  WAIVED:CV32E40P
  #352·wallento opened May 23, 2020Contributor·1 of 3 tasks·

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  1

• Fix Verilator simulations

  WAIVED:CV32E40P
  #351·wallento opened May 23, 2020Contributor·

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