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feat: support decode context parallelism for PyTorch MLA - #4952

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CUHKSZzxy:feat/dcp
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feat: support decode context parallelism for PyTorch MLA#4952
CUHKSZzxy wants to merge 19 commits into
InternLM:mainfrom
CUHKSZzxy:feat/dcp

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Motivation

Reduce replicated MLA KV-cache storage within attention tensor parallelism by adding opt-in decode context parallelism (DCP) to the PyTorch backend. DCP reuses existing TP ranks instead of increasing the model world size.

Modification

  • Add --dcp / PytorchEngineConfig(dcp=...), DCP process groups, interleaved cache ownership, and scheduler accounting for logical blocks spanning multiple ranks.
  • Support dense FlashMLA and sparse DSA attention with rank-local KV reads, query-head gathering, and LSE-based output merging. Sparse DSA exchanges and merges local top-k candidates into global selections.
  • Support cached-prefix prefill through bounded MLA context gathering and FP32 accumulation across chunks. Reserve gather/merge and top-k workspace, including MTP-expanded verification rows.
  • Support deepseek_mtp for dense and sparse MLA with per-query causal lengths and CUDA-graph-compatible metadata.
  • Document the supported configurations and extend numerical/cache-layout tests, including BF16/FP8 cached prefill with DCP2/DCP4.

dcp=1 remains the default. TurboMind's existing --cp option is unchanged.

Supported scope and remaining work

  • CUDA Hopper/SM90, FlashMLA-backed MLA, BF16 activations, DP1/EP1. FP8 model weights are compatible with BF16 activations; sparse MLA also supports the blocked-FP8 MLA KV layout.
  • Sparse DSA top-k is limited to 512/2048 and requires compatible DeepGEMM, TileLang, and FlashMLA kernels.
  • No sliding-window attention, MemDecode, prefill/decode disaggregation, or external KV-cache connectors in this initial scope.
  • Flattened indexer KV relies on remaining memory headroom; the reservation is not a hard cap on all indexer temporary allocations. Decode-score chunking is not implemented.
  • Keep this PR in draft while reviewing prefix-cache behavior and performance. Full-model cold/warm exact-output differences also reproduced with DCP disabled and with BF16 KV; no DCP-specific cache corruption was identified, but the source remains unisolated. This is not an unconditional prefix-cache correctness sign-off or a short-context speedup claim.

Validation

On the published head:

  • pytest tests/pytorch/engine/test_executor_base.py tests/pytorch/test_dcp.py -q: 53 passed on CPU.
  • pytest tests/pytorch/kernel/test_mla_attention.py -k dcp -q: 14 passed on one H200 GPU. Cached-prefill tests execute real cache-writing and attention kernels against an independent reference; DCP collectives are simulated in these single-GPU tests.
  • All applicable pre-commit hooks passed.

Earlier full-model validation during branch development used GLM-5.2-FP8, TP8/DCP4, MTP5, and CUDA graphs. GSM8K scored 1268/1319 (96.1334%) with prefix caching off and 1266/1319 (95.9818%) with it enabled. The prefix-enabled dataset run had zero cache hits, so these scores do not validate reused-prefix correctness. Separate full-model replay controls exercised actual cache hits and exposed the parity caveat above. These were single runs, not a statistically established accuracy or performance comparison, and were not rerun for the final accounting-only change.

The full downstream dependency-version matrix has not been validated.

Assistance

Assisted with Codex + GPT-6-Astra High, reviewed manually

Count speculative verification rows in DCP top-k workspace estimates and clarify the reserved buffer scope. Extend cached-prefill numerical coverage to DCP2/DCP4 and BF16/FP8 caches.

Validation: 53 executor/DCP CPU tests and 14 DCP attention tests passed on one H200 GPU. Ruff and git diff --check passed.
Preserve DCP cache ownership and metadata alongside upstream piecewise CUDA graph entry points. Retain both DCP and TileLang numerical coverage, reject the unsupported TileLang attention plus DCP combination, and remove the requested MTP loader test.

Validation: 233 CPU tests passed (16 skipped); all 40 MLA/indexer tests passed on one H200 GPU.
Fuse rank-local index filtering and ordered compaction, avoid packing contiguous queries before all-gather, and clarify DCP helper names.

Remove full-score NaN sanitation while preserving index masks and empty-shard attention handling. Widen candidate score addressing to int64 for large CUDA graph buffers and cover the affected paths with regression tests.
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