[CarolineConcatto]

Add ACLE intrinsics for:

LDNP[1]/STNP[2] non-temporal pairs. These instructions are not part of FEAT_LSUI.

The 128-bit instruction forms are proposed using Neon vector types because there are no scalar arithmetic instructions with a 128-bit scalar data type.

A scalar 128-bit floating-point type is not consistently available across AArch64 targets. For example, long double is 64-bit on Darwin and Windows AArch64 targets.

References:

[1]https://support.arm.com/documentation/ddi0602/2026-09/SIMD-FP-Instructions/LDNP--SIMD-FP---Load-pair-of-SIMD-FP-registers--with-non-temporal-hint-?lang=en [2]https://support.arm.com/documentation/ddi0602/2026-09/SIMD-FP-Instructions/STNP--SIMD-FP---Store-pair-of-SIMD-FP-registers--with-non-temporal-hint-?lang=en

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[CarolineConcatto]

I am not sure we should use stride here, but ld/st only have stride options

[CarolineConcatto]

So I choose to represent the pair as _x2, so in the future if we have 3, 4 or whatever registers we could only add _x3, _x4. But the previous neon use the the name of the instruction:
so this vldn_u32_x2 would be vldnp_u32.
Any opinion?