Skip to content

Users following lowRISC

@alphab037
JiminByeon alphab037
Hardware, Korea Univ.
@m8l8th814n-eng
k3ff m8l8th814n-eng
unixing since 1993, AI ? Well I do not care really, as long as the code is quality. And as long as the development is going forward with or without AI Im OK.

sweden

@MrPoloGit
Marco Frank MrPoloGit
MS CSE @ UCSC

CA, USA

@lucasnogueiramaluly
Lucas Nogueira Maluly de Carvalho lucasnogueiramaluly
Computer Engineering @ USP | RISC-V, computer architecture, digital design & embedded systems
@Sarthak7651
Sarthak Pandey Sarthak7651
RTL Design & Verification Engineer | Verilog • SystemVerilog • UVM • Digital Design | VLSI & SoC

ADVANCE COMPUTER TRAINING SCHOOL CDAC PUNE

@chrinovicmu
Chrinovic Mukanya chrinovicmu
Computer Programmer. Linux kernel, virtualization, compilers and HPC

Gehirn/NERV Central Laboratory Johannesburg, South Africa

@pepe
Josef Pospíšil pepe
Janet 💙💛

LastStar.eu Liberec, Czech Republic

@Ahmed-Hatem-Mohamed
Ahmed Hatem Salem Ahmed-Hatem-Mohamed
I am obsessed with Computational Neuroscience, Computer Architecture and Math
@vcaeken
Koen Van Caekenberghe vcaeken
Analog mixed-signal / RF IC designer

ChipDesign B.V. Meise, Belgium

@iammituraj
Mitu Raj iammituraj
RTL Design Engineer, SW Developer, Technical Blogger, Philanthropist, Teacher...

Chipmunk Logic™ India

@biswajek
Biswajeet biswajek

Verana Networks Bangalore

@Justin-Ju-0413
Justin JU Justin-Ju-0413
华南理工微电子 · RISC-V/CNN 加速器 · AI 应用与全栈开发

SCUT Guangzhou, China

@JBB092
José Bernardo Barquero Bonilla JBB092
Estudiante de Ingeniería en Computadores del Instituto Tecnológico de Costa Rica sede de Cartago

Instituto Tecnológico de Costa Rica Costa Rica

@Srinivassa
Srinivasa Rao Dara Srinivassa
Securing Hardware Accelerator Designing against ML/DL based Attacks
@sakilxo
sakil sakilxo
unpaid opensource dev
@Raveem13
Raveem KG Raveem13
I spend my time in learning and using technologies. | I love writing code and collaborating with other developer.

Bengaluru

@apsarras
Tasos Psarras apsarras
SoC Design Engineer
@atifhans
Atif Iqbal Ahangar atifhans
ASIC Design Engineer

United States

@SaiPranayGandla
Sai Pranay Gandla SaiPranayGandla
B.Tech ECI | VLSI & Embedded Systems Enthusiast | Verilog HDL

Hyderabad, Telangana

@yaojiwww
yaojiwww yaojiwww
莫欺少年穷

@gdmuna

@ancuongnguyen07
Cuong Nguyen ancuongnguyen07
Entry-level programmer
@rahulnerella86
Rahul Nerella rahulnerella86
Electronics student at VIT Vellore , 2028 batch